Simulation of T Junction Power Divider Using Ansys Electronics Desktop Part 1 — Lesson 4

In this module, a microstrip power divider is simulated using Ansys HFSS with parameterization.

A T-shaped power divider with a power division ratio of 2:1 is simulated in this video lesson. The widths of the microstrip traces are derived using the transmission line designer (TRL) tool included in Ansys Circuit. The model geometry is created from Ansys Circuit to Ansys HFSS. The creation of an HFSS project variable to parametrize the permittivity of the substrate material is also shown.
 

 
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