Simulation of a T-junction Power Divider, Part 1 — Lesson 4

In this module, a microstrip power divider is simulated using Ansys HFSS with parameterization.

A T-shaped power divider with a power division ratio of 2:1 is simulated in this video lesson. The widths of the microstrip traces are derived using transmission line designer (TRL) tool included in Ansys HFSS Circuit. The model geometry is created from Ansys HFSS Circuit to Ansys HFSS. Creation of a HFSS project variable to parametrize the permittivity of the substrate material is also shown.


Alternate video link.